[Bug 104297] [i965] Downward causes GPU hangs and misrendering on Haswell

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=104297

Danylo <danylo.piliaiev at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |danylo.piliaiev at gmail.com
             Status|NEEDINFO                    |NEW

--- Comment #38 from Danylo <danylo.piliaiev at gmail.com> ---
Hello,

I'm not sure that there are still hangs, I have tested a demo version of
Downward and didn't experienced any.

However I have found at least two issues with tesselation control shader:

1) Unmatched outputs in TCS are being reduced to local variables, I made a fix,
see https://gitlab.freedesktop.org/mesa/mesa/merge_requests/59 - it will be
probably merged soon.

2) The second is more interesting:
  In short: something is broken with vec4 TCS shader when registers are
spilled.

  Long version: 
    Consider next part of TCS:
    -----------
    layout(location=0) out vec4 out1[3];
    layout(location=1) out vec4 out2[3];

    void main() {
        out1[gl_InvocationID] = gl_in[gl_InvocationID].gl_Position;
        out2[gl_InvocationID] = gl_in[gl_InvocationID].gl_Position;

        barrier();

        if (out1[0] != out2[0] || out1[1] != out2[1] || out1[2] != out2[2]) {
            atomicCounterIncrement(mismatches);
        } else {
            atomicCounterIncrement(matches);
        }
    -----------

    While 'out1' should always match 'out2' it isn't the case when launching on
any platform with:
> INTEL_DEBUG=spill_vec4 INTEL_SCALAR_TCS=0
    Or just launching on Haswell.
    If you add
> hs.SingleProgramFlow = true;
    to '3DSTATE_HS' the 'matches' will be zero most times but also not always.
    The incorrect values in these arrays are not garbage when mismatched but
copies of nearby values (saw this in one iteration of testing in RenderDoc).

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