[Bug 110905] Fragment shader compilation broken with SIMD32

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=110905

            Bug ID: 110905
           Summary: Fragment shader compilation broken with SIMD32
           Product: Mesa
           Version: git
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: medium
         Component: Drivers/DRI/i965
          Assignee: intel-3d-bugs at lists.freedesktop.org
          Reporter: eero.t.tamminen at intel.com
        QA Contact: intel-3d-bugs at lists.freedesktop.org

Setup:
* GEN9 HW
* Latest Mesa from git

Test-case:
1. Run something with SIMD32 fragment shaders
   $ INTEL_DEBUG=do32 glxgears

Expected outcome:
* Everything works fine, like it did earlier, and it does with SIMD16

Actual outcome:
---------------------------------------------
glxgears: src/intel/compiler/brw_fs.cpp:1726: void
fs_visitor::assign_urb_setup(): Assertion `inst->src[i].offset < REG_SIZE / 2'
failed.
Aborted (core dumped)
---------------------------------------------

This has broken somewhere between:
* 2019-04-22 e983a975c6843c307380d7caa083eee89e02bd3c: gallivm: disable NEON
instructions if they are not supported
* 2019-04-23 951d60f8cdc886adff09201ff65002e3ee1a4c61: radeonsi: delay adding
BOs at the beginning of IBs until the first draw

(Not sure what severity this should have. SIMD32 is important performance
feature, e.g. on BXT it improves perf in one test-case by ~35%, and on average
several percents with suitable heuristic.)

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/intel-3d-bugs/attachments/20190612/6eff0ada/attachment.html>