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      <base href="https://bugs.freedesktop.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [965GM] piglit fails many tests after a5d7e144"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=95370">95370</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[965GM] piglit fails many tests after a5d7e144
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>Mesa
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>git
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>x86-64 (AMD64)
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux (All)
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>medium
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Drivers/DRI/i965
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>idr@freedesktop.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>mark.a.janes@intel.com
          </td>
        </tr>

        <tr>
          <th>QA Contact</th>
          <td>intel-3d-bugs@lists.freedesktop.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Most of piglit fails pixel comparisons for 965GM at this commit.  Strangely, a
similar 965G system continues to pass all tests:

--------------------------------------------------------
a5d7e144eaf43fee37e6ff9e2de194407087632b
Author:     Connor Abbott <<a href="mailto:cwabbott0@gmail.com">cwabbott0@gmail.com</a>>
AuthorDate: Mon Aug 3 17:44:08 2015 -0700

i965/fs: extend exec_size halving in the generator

The HW has a restriction that only vertical stride may cross register
boundaries. Previously, this only mattered for SIMD16 instructions where
we needed to use the same regioning parameters as the equivalent SIMD8
instruction but double the exec size. But we need to do the same
splitting for 64-bit instructions as well as instructions with a stride
of 2 (which effectively consume 64 bits per element). Fix up the code to
do the right thing instead of special-casing SIMD16.

Reviewed-by: Jordan Justen <<a href="mailto:jordan.l.justen@intel.com">jordan.l.justen@intel.com</a>>
Reviewed-by: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>>

--------------------------------------------------------

Sample test output:
/tmp/build_root/m64/lib/piglit/bin/shader_runner
/tmp/build_root/m64/lib/piglit/generated_tests/spec/glsl-1.10/execution/interpolation/interpolation-none-gl_FrontColor-smooth-none.shader_test
-auto
Probe color at (111,55)
  Expected: 0.666667 0.166667 0.166667 1.000000
  Observed: 1.000000 0.913726 0.000000 1.000000
Probe color at (159,45)
  Expected: 0.500000 0.166667 0.333333 1.000000
  Observed: 1.000000 1.000000 0.000000 1.000000
Probe color at (166,83)
  Expected: 0.333333 0.333333 0.333333 1.000000
  Observed: 0.584314 1.000000 0.000000 1.000000</pre>
        </div>
      </p>


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