<html>
    <head>
      <base href="https://bugs.freedesktop.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - stencil texturing assertions in ISL"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=96978">96978</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>stencil texturing assertions in ISL
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>Mesa
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>git
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>medium
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Drivers/DRI/i965
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>idr@freedesktop.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>mark.a.janes@intel.com
          </td>
        </tr>

        <tr>
          <th>QA Contact</th>
          <td>intel-3d-bugs@lists.freedesktop.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>The following assertions were found in CI when the generic ISL-based path was
enabled.

mesa 8521ce1a7ecb2e67f259d92c645a18ffbc49d347
i965/gen7: Use the generic ISL-based path for texture surfaces

Signed-off-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>>
Reviewed-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>>
Reviewed-by: Chad Versace <<a href="mailto:chad.versace@intel.com">chad.versace@intel.com</a>>

regresses BYT,HSW,IVB
cts.gtf.gl3tests.packed_depth_stencil.packed_depth_stencil_stenciltexturing
deqp-gles31.functional.stencil_texturing.format.depth24_stencil8_2d
deqp-gles31.functional.stencil_texturing.format.depth24_stencil8_2d_array
deqp-gles31.functional.stencil_texturing.format.depth24_stencil8_cube
deqp-gles31.functional.stencil_texturing.format.depth32f_stencil8_2d
deqp-gles31.functional.stencil_texturing.format.depth32f_stencil8_2d_array
deqp-gles31.functional.stencil_texturing.format.depth32f_stencil8_cube
deqp-gles31.functional.stencil_texturing.misc.base_level
deqp-gles31.functional.stencil_texturing.render.depth24_stencil8_clear
deqp-gles31.functional.stencil_texturing.render.depth24_stencil8_draw
deqp-gles31.functional.stencil_texturing.render.depth32f_stencil8_clear
deqp-gles31.functional.stencil_texturing.render.depth32f_stencil8_draw
deqp-gles31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.gather_size_npot
deqp-gles31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.gather_size_pot
deqp-gles31.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.gather_size_npot
deqp-gles31.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.gather_size_pot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_clamp_to_edge_t_clamp_to_border_npot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_clamp_to_edge_t_clamp_to_border_pot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_mirrored_repeat_t_clamp_to_border_npot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_mirrored_repeat_t_clamp_to_border_pot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_repeat_t_clamp_to_border_npot
deqp-gles31.functional.texture.border_clamp.per_axis_wrap_mode.texture_2d.uint_stencil.gather.s_repeat_t_clamp_to_border_pot



mesa 366a6a659d00442631a939d7de80b239b943f6e7
i965/blorp: Use the generic ISL path for texture surfaces on gen7

Signed-off-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>>
Reviewed-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>>
Reviewed-by: Chad Versace <<a href="mailto:chad.versace@intel.com">chad.versace@intel.com</a>>

regresses BYT,HSW,IVB:
piglit.spec.ext_framebuffer_multisample_blit_scaled.blit-scaled samples.2 with
gl_texture_2d_multisample_array
piglit.spec.ext_framebuffer_multisample_blit_scaled.blit-scaled samples.4 with
gl_texture_2d_multisample_array



Assertions:
src/intel/isl/isl_surface_state.c:416: isl_gen7_surf_fill_state_s: Assertion
`info->aux_usage == ISL_AUX_USAGE_NONE' failed.

src/mesa/drivers/dri/i965/brw_wm_surface_state.c:449:
brw_update_texture_surface: Assertion `brw->gen >= 8' failed.</pre>
        </div>
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