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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - skylake: page fault accessing address 0"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101283">101283</a>
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<th>Summary</th>
<td>skylake: page fault accessing address 0
</td>
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<th>Product</th>
<td>Mesa
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<th>Version</th>
<td>17.0
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<th>Hardware</th>
<td>Other
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>medium
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<th>Component</th>
<td>Drivers/Vulkan/intel
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<th>Assignee</th>
<td>intel-3d-bugs@lists.freedesktop.org
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<th>Reporter</th>
<td>cstout@chromium.org
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<th>QA Contact</th>
<td>intel-3d-bugs@lists.freedesktop.org
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<th>CC</th>
<td>jason@jlekstrand.net
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<p>
<div>
<pre>The function blorp_emit_gen8_hiz_op contains a pipe control operation that has
only the WriteImmediateData bit set. It doesn't specify an address, so this
results in a store to address 0.
a) What is this pipe control for? I don't see the need for it in the docs.
>From what I can see, the docs for 3DSTATE_WM_HZ_OP say: "As this command
generates an implicit rectangle, SW must make sure any MMIO register writes
following WM_HZ_OP must be preceded by PIPE_CONTROL with Command Streamer Stall
Enable bit set."
In the code there's a following PIPECONTROL with depth_stall and depth flush
bits set, which corresponds to the docs in the section 'Depth Buffer Clear'.
b) How is it not a problem to emit a pipecontrol that writes to address 0?
Thanks.</pre>
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</p>
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