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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107212#c36">Comment # 36</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107212">bug 107212</a>
from <span class="vcard"><a class="email" href="mailto:diego.viola@gmail.com" title="Diego Viola <diego.viola@gmail.com>"> <span class="fn">Diego Viola</span></a>
</span></b>
<pre>[diego@dualcore mesa]$ git bisect bad
8aee87fe4cce0a883867df3546db0e0a36908086 is the first bad commit
commit 8aee87fe4cce0a883867df3546db0e0a36908086
Author: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>>
Date: Fri Feb 20 14:09:17 2015 -0800
i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.
Gen5+ systems allow you to specify multiple shader programs - both SIMD8
and SIMD16 - and the hardware will automatically dispatch to the most
appropriate one, given the number of subspans to be processed.
However, that is not the case on Gen4. Instead, you program a single
shader. If you enable multiple dispatch modes (SIMD8 and SIMD16), the
shader is supposed to contain a series of jump instructions at the
beginning. The hardware will launch the shader at a small offset,
hitting one of the jumps.
We've always thought that sounds like a pain, and weren't clear how it
affected performance - is it worth having multiple shader types? So,
we never bothered with SIMD16 until now.
This patch takes a simpler approach: try and compile a SIMD16 shader.
If possible, set the no_8 flag, telling the hardware to just use the
SIMD16 variant all the time.
Signed-off-by: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>>
Reviewed-by: Jordan Justen <<a href="mailto:jordan.l.justen@intel.com">jordan.l.justen@intel.com</a>>
:040000 040000 a0bac15a1f0b79b629c912cdcee2265f8a968d81
45a6b6fb2fd15aab6b877277ecee33b41cad2ef4 M src
[diego@dualcore mesa]$</pre>
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