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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [lars] dEQP-GLES31.functional.geometry_shading.layered#render_with_default_layer_3d failure"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107505#c6">Comment # 6</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [lars] dEQP-GLES31.functional.geometry_shading.layered#render_with_default_layer_3d failure"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107505">bug 107505</a>
from <span class="vcard"><a class="email" href="mailto:gaurav.k.singh@intel.com" title="gaurav.k.singh@intel.com">gaurav.k.singh@intel.com</a>
</span></b>
<pre>Common reasons why test results may differ within a GPU generation:
* Mesa has a bug in URB allocation because the two SKUs have different URB
sizes.
* The L3 cache may be coherent between the GPU and CPU on one chipset, but
inchorent on the other chipset.
* One device has 1 DIMM of RAM, the other device has 2 DIMMS. In this case,
the hardware will swizzle the tiling patterns differently. Specifically, X and
Y tiles with 1 DIMM differ from X and Y tiles with 2 DIMMS. This rarely causes
bugs, but it's worth considering.
* The SKU requires a hardware workaround (maybe documented, maybe not) that
Mesa has not yet implemented.
Checked the DIMM configuration thing, in both passing and failing cases, DIIM
configuration is same. SO, that is eliminated as well.
There is a difference in cache size in passing and failing case.Suspecting Mesa
to have a bug in URB allocation or this particular SKU requires a hardware
workaround to be fixed in Mesa.Would like Mesa's team insights into this bug.
Please do let me know if any other debug input is required.</pre>
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