<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - [SKL] (recoverable) GPU hangs in benchmarks using compute shaders with drm-tip v4.20-rc kernels" href="https://bugs.freedesktop.org/show_bug.cgi?id=108820#c28">Comment # 28</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - [SKL] (recoverable) GPU hangs in benchmarks using compute shaders with drm-tip v4.20-rc kernels" href="https://bugs.freedesktop.org/show_bug.cgi?id=108820">bug 108820</a> from <a class="email" href="mailto:eero.t.tamminen@intel.com" title="Eero Tamminen <eero.t.tamminen@intel.com>"> Eero Tamminen</a> <pre>Jakub, are still seeing the hangs with your test-cases? I haven't see them for a while with my test-cases when using latest Mesa (and drm-tip kernel 2.20 or 5.0-rc). There have been a couple of CS related Mesa fixes since I filed this bug: ---------------------------------------------------------------- commit fea5b8e5ad5042725cb52d6d37256b9185115502 Author: Oscar Blumberg <<a href="mailto:carnaval@12-10e.me">carnaval@12-10e.me</a>> AuthorDate: Sat Jan 26 16:47:42 2019 +0100 Commit: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>> CommitDate: Fri Feb 1 10:53:33 2019 -0800 intel/fs: Fix memory corruption when compiling a CS Missing check for shader stage in the fs_visitor would corrupt the cs_prog_data.push information and trigger crashes / corruption later when uploading the CS state. ... commit 31e4c9ce400341df9b0136419b3b3c73b8c9eb7e Author: Lionel Landwerlin <<a href="mailto:lionel.g.landwerlin@intel.com">lionel.g.landwerlin@intel.com</a>> AuthorDate: Thu Jan 3 16:18:48 2019 +0000 Commit: Lionel Landwerlin <<a href="mailto:lionel.g.landwerlin@intel.com">lionel.g.landwerlin@intel.com</a>> CommitDate: Fri Jan 4 11:18:54 2019 +0000 i965: add CS stall on VF invalidation workaround Even with the previous commit, hangs are still happening. The problem there is that the VF cache invalidate do happen immediately without waiting for previous rendering to complete. What happens is that we invalidate the cache the moment the PIPE_CONTROL is parsed but we still have old rendering in the pipe which continues to pull data into the cache with the old high address bits. The later rendering with the new high address bits then doesn't have the clean cache that it expects/needs. ---------------------------------------------------------------- If you're still seeing hangs and they're 100% reproducible, I think it would be better to file a separate bug about it, and get it bisected.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> <li>You are the assignee for the bug.</li> </ul> </body> </html>