[Bug 59841] [IVB cpu eDP] panel is broken due to 657445fe86 (eDP bpp clamping)

[bugzilla-daemon at bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=59841

--- Comment #50 from jkp <jkp at iki.fi> ---
Retested - attachment 107199 doesn't fix the problem for the TX300, but my
simple code rearrangement patch does fix the bug. Code repeated below.

--- drivers/gpu/drm/i915/intel_dp.c.orig    2013-08-25 10:30:20.874203289 +0300
+++ drivers/gpu/drm/i915/intel_dp.c    2013-08-25 11:18:34.471952195 +0300
@@ -710,8 +710,8 @@
     /* Walk through all bpp values. Luckily they're all nicely spaced with 2
      * bpc in between. */
     bpp = pipe_config->pipe_bpp;
-    if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
-        bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
+    // if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
+    //     bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);

     for (; bpp >= 6*3; bpp -= 2*3) {
         mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
@@ -749,7 +749,7 @@

     intel_dp->link_bw = bws[clock];
     intel_dp->lane_count = lane_count;
-    pipe_config->pipe_bpp = bpp;
+    // pipe_config->pipe_bpp = bpp;
     pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);

     DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
@@ -764,6 +764,11 @@

     intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw);

+    if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
+         bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
+    
+    pipe_config->pipe_bpp = bpp;
+
     return true;
 }

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