[Bug 65524] [sdvo lvds regression] "Use &intel_sdvo->ddc instead of intel_sdvo->i2c for DDC"

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=65524

--- Comment #10 from Chris Wilson <chris at chris-wilson.co.uk> ---
Using the EDID:

requested: Modeline 0:"1024x600" 60 44700 1024 1034 1066 1194 600 612 616 624
0x48 0xa
preferred input: Modeline 0:"1024x600" 60 44700 1024 1034 1066 1194 600 612 616
624 0x48 0xa
adjusted: Modeline 0:"1024x600" 60 178800 1024 1034 1066 1194 600 612 616 624
0x48 0xa

-> refclk=120000, clock=(.m1=14, .m2=7, n=4, .p1=1, .p2=10), computed dotclock
= 178000 [broken]

with pixel_multiplier=2:

refclk=120000, clock=(.m1=14, .m2=7, n=2, .p1=3, .p2=10), computed dotclock =
89000 [works]

Using VBT:

request: Modeline 0:"1024x600" 60 50500 1024 1034 1066 1348 600 612 616 624
0x48 0xa
preferred input: Modeline 0:"1024x600" 60 50500 1024 1034 1066 1348 600 612 616
624 0x48 0xa
adjusted:  Modeline 0:"1024x600" 60 101000 1024 1034 1066 1348 600 612 616 624
0x48 0xa

->  refclk=120000, clock=(.m1=16, .m2=9, n=2, .p1=3, .p2=10), computed dotclock
= 101000 [works]

with pixel_multiplier=4:
-> refclk=120000, clock=(.m1=13, .m2=7, n=3, .p1=1, .p2=10), computed dotclock
= 201600 [broken]


The bspec is very clear in that the allowable dotclock range for sDVO is
100-225MHz on Ironlake. So I have no idea why either the forced
pixel_multiplier=2 works for the EDID mode, nor why it fails with
pixel_multiplier=4. I also distrust the VBT modes, on other machines they are
garbage. It is a less than satisfactory situation.

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