[Bug 59841] [IVB cpu eDP] Internal display not shown with intel X driver
bugzilla-daemon at bugzilla.kernel.org
bugzilla-daemon at bugzilla.kernel.org
Tue Jun 25 01:25:03 PDT 2013
https://bugzilla.kernel.org/show_bug.cgi?id=59841
Chris Wilson <chris at chris-wilson.co.uk> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |chris at chris-wilson.co.uk
--- Comment #15 from Chris Wilson <chris at chris-wilson.co.uk> 2013-06-25 08:25:03 ---
Ah, your patch makes it compute the bw/lanes/clocks required for bpp=24 and
then clamps it down to 18. So in the working config, it selects 2 lanes at
clock 0xa - but then fails when we believe we can downclock to 0x6.
An alternative would to be to apply a small amount of fudge:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 24a44ed..3ad6bef 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -102,7 +102,7 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
static int
intel_dp_link_required(int pixel_clock, int bpp)
{
- return (pixel_clock * bpp + 9) / 10;
+ return (pixel_clock * bpp + 9) / 10 * 40 / 39;
}
static int
which would ensure that there was always 2.5% overprivisioning in the link.
--
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