[Bug 64270] New: [IVB/HSW Bisected]I-G-T gem_wait_render_timeout Aborted

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=64270

          Priority: high
            Bug ID: 64270
                CC: yangweix.shui at intel.com
          Assignee: intel-gfx-bugs at lists.freedesktop.org
           Summary: [IVB/HSW Bisected]I-G-T gem_wait_render_timeout
                    Aborted
        QA Contact: intel-gfx-bugs at lists.freedesktop.org
          Severity: major
    Classification: Unclassified
                OS: Linux (All)
          Reporter: huax.lu at intel.com
          Hardware: All
            Status: NEW
           Version: unspecified
         Component: DRM/Intel
           Product: DRI

System Environment:
--------------------------
Arch:             x86_64
Platform:         Ivybridge/Haswell
Kernel:        drm-intel-fixes 3ab9c63705cb7b1b9f83ddce725d8bd9ef7c66a9

Bug detailed description:
-------------------------
It happens on ivybridge and haswell with drm-intel-fixes kernel. It works well
on -queued kernel.
Bisect shows:3ab9c63705cb7b1b9f83ddce725d8bd9ef7c66a9 is the first bad commit.
commit 3ab9c63705cb7b1b9f83ddce725d8bd9ef7c66a9
Author:     Imre Deak <imre.deak at intel.com>
AuthorDate: Fri May 3 12:57:41 2013 +0300
Commit:     Daniel Vetter <daniel.vetter at ffwll.ch>
CommitDate: Sat May 4 10:24:56 2013 +0200

    drm/i915: hsw: fix link training for eDP on port-A

    According to BSpec the link training sequence for eDP on HSW port-A
    should be as follows:

    1. link training: clock recovery
    2. link training: equalization
    3. link training: set idle transmission mode
    4. display pipe enable
    5. link training: disable (set normal mode)

    Contrary to this at the moment we don't do step 3. and we do step 5.
    before step 4. Fix this by setting idle transmission mode for eDP at
    the end of intel_dp_complete_link_train and adding a new
    intel_dp_stop_link_training function to disable link training. With
    these changes we'll end up with the following functions corresponding
    to the above steps:

    intel_dp_start_link_train    -> step 1.
    intel_dp_complete_link_train -> step 2., step 3.
    intel_dp_stop_link_train     -> step 5.

    For port-A we'll call intel_dp_stop_link_train only after enabling the
    pipe, for everything else we'll call it right after
    intel_dp_complete_link_train to preserve the current behavior.

    Tested on HSW/HSW-ULT.

    In v2:
    - Due to a HW issue we must set idle transmission mode for port-A too
      before enabling the pipe. Thanks for Arthur Runyan for explaining
      this.
    - Update the patch subject to make it clear that it's an eDP fix, DP is
      not affected.

    v3:
    - rename intel_dp_link_train() to intel_dp_set_link_train(), use 'val'
      instead 'l' as var name. (Paulo)

    Signed-off-by: Imre Deak <imre.deak at intel.com>
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Tested-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>


output:
32768 iters is enough work
Finished with 577060485 time remaining
gem_wait_render_timeout: gem_wait_render_timeout.c:211: main: Assertion
`timeout == 0' failed.
Aborted (core dumped)

dmesg:
[  371.560608] [drm:i915_driver_open],
[  371.560632] [drm:intel_crtc_set_config], [CRTC:3] [FB:30] #connectors=1 (x
y) (0 0)
[  371.560637] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]
[  371.560640] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
[  371.560642] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]
[  371.560644] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
[  371.560646] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]
[  371.560656] [drm:i915_driver_open],
[  371.560688] [drm:i915_getparam], Unknown parameter 22
[  384.133534] [drm:intel_crtc_set_config], [CRTC:3] [FB:30] #connectors=1 (x
y) (0 0)
[  384.133541] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]
[  384.133544] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
[  384.133546] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]
[  384.133547] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
[  384.133549] [drm:intel_modeset_stage_output_state], [CONNECTOR:9:VGA-1] to
[CRTC:3]


Reproduce steps:
----------------
1. ./gem_wait_render_timeout

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