[Bug 69791] New: [GM45 Bisected]Boot system has <3>[ 1.894068] [drm:intel_pipe_config_compare] *ERROR* mismatch in adjusted_mode.flags(DRM_MODE_FLAG_NHSYNC) (expected 2, found 0)

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Tue Sep 24 23:21:57 PDT 2013


https://bugs.freedesktop.org/show_bug.cgi?id=69791

          Priority: high
            Bug ID: 69791
                CC: intel-gfx-bugs at lists.freedesktop.org
          Assignee: intel-gfx-bugs at lists.freedesktop.org
           Summary: [GM45 Bisected]Boot system has <3>[    1.894068]
                    [drm:intel_pipe_config_compare] *ERROR* mismatch in
                    adjusted_mode.flags(DRM_MODE_FLAG_NHSYNC) (expected 2,
                    found 0)
        QA Contact: intel-gfx-bugs at lists.freedesktop.org
          Severity: major
    Classification: Unclassified
                OS: Linux (All)
          Reporter: huax.lu at intel.com
          Hardware: All
            Status: NEW
           Version: unspecified
         Component: DRM/Intel
           Product: DRI

Created attachment 86505
  --> https://bugs.freedesktop.org/attachment.cgi?id=86505&action=edit
dmesg

System Environment:
--------------------------
Arch:           x86_64
Platform:       GM45
Kernel:         (drm-intel-nightly)15425dbba39114d8dfbb12f6ddb1f39d0cae144a

Bug detailed description:
-----------------------------
It happens on GM45 with -fixes, -nightly, -queued kernel.
Boot system, <3>[  1.894068] [drm:intel_pipe_config_compare] *ERROR* mismatch
in adjusted_mode.flags(DRM_MODE_FLAG_NHSYNC) (expected 2, found 0) appears in
dmesg.
It is the same as Bug 66482.

Bisect shows: 2960bc9cceecb5d556ce1c07656a6609e2f7e8b0 is the first bad commit.
commit 2960bc9cceecb5d556ce1c07656a6609e2f7e8b0
Author:     Imre Deak <imre.deak at intel.com>
AuthorDate: Tue Jul 30 13:36:32 2013 +0300
Commit:     Daniel Vetter <daniel.vetter at ffwll.ch>
CommitDate: Mon Aug 5 19:04:05 2013 +0200

    drm/i915: make user mode sync polarity setting explicit

    Userspace can pass a mode with an unspecified vsync/hsync polarity
    setting. All encoders in the Intel driver take this to mean a negative
    polarity setting. The HW readout/state checker code on the other hand
    needs these flags to be explicitly set, otherwise the state checker will
    WARN about the mismatch.

    Get rid of the WARN by making the polarity setting explicit in the
    adjusted mode flags based on the requested mode flags. This will keep
    the existing behavior otherwise.

    Note that we could guess from the other timing parameters whether the
    user wanted a VESA or other standard mode and set the polarity
    accordingly. This is what the NV driver does
    (drivers/gpu/drm/nouveau/dispnv04/crtc.c), but I think that's not very
    exact and would change the existing behavior of the Intel driver.

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65442
    Signed-off-by: Imre Deak <imre.deak at intel.com>
    Tested-by: cancan,feng <cancan.feng at intel.com>
    Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
    Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

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