[Bug 87399] New: [HSW Bisected]78a4237 drm/i915: Use batch pools with the command parser

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=87399

            Bug ID: 87399
           Summary: [HSW Bisected]78a4237 drm/i915: Use batch pools with
                    the command parser
           Product: DRI
           Version: DRI git
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: medium
         Component: DRM/Intel
          Assignee: intel-gfx-bugs at lists.freedesktop.org
          Reporter: jinxianx.guo at intel.com
        QA Contact: intel-gfx-bugs at lists.freedesktop.org
                CC: intel-gfx-bugs at lists.freedesktop.org

==System Environment==
--------------------------
Regression: Yes

Non-working platforms: HSW

==kernel==
--------------------------
origin/drm-intel-nightly: 2012-12-17(fails)
    drm-intel-nightly: 2014y-11m-26d-20h-40m-01s UTC integration manifest

==Bug detailed description==
(HSW)igt/gem_ctx_exec/eviction PASS->DMESG_WARN

==Reproduce steps==
---------------------------- 
1. ./gem_ctx_exec --run-subtest eviction


Dmesg:
[ 1278.593396] WARNING: CPU: 1 PID: 31207 at
drivers/gpu/drm/i915/i915_gem_evict.c:42 mark_free.part.0+0x3b/0x53 [i915]()
[ 1278.593397] WARN_ON(!list_empty(&vma->exec_list))
[ 1278.593398] Modules linked in: ipv6 dm_mod joydev iTCO_wdt
iTCO_vendor_support snd_hda_codec_realtek snd_hda_codec_generic dcdbas
snd_hda_codec_hdmi snd_hda_intel serio_raw pcspkr snd_hda_controller
snd_hda_codec snd_hwdep snd_pcm shpchp lpc_ich snd_timer i2c_i801 mfd_core snd
soundcore battery acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect
cfbimgblt cfbcopyarea
[ 1278.593413] CPU: 1 PID: 31207 Comm: gem_ctx_exec Not tainted
3.18.0_prts_8b7ac3_20141217_debug+ #70
[ 1278.593414] Hardware name: Dell Inc. OptiPlex 9020/01PCY1, BIOS A07
04/25/2014
[ 1278.593415] 0000000000000009 ffff8801e1637978 ffffffff8182d11d
0000000002b65251
[ 1278.593417] ffff8801e16379c8 ffff8801e16379b8 ffffffff8103f9df
0000000000000100
[ 1278.593418] ffffffffa00ae977 ffff8801a5c64800 ffff8801e1637a78
ffff88020d567000
[ 1278.593420] Call Trace:
[ 1278.593425] [] dump_stack+0x46/0x58
[ 1278.593428] [] warn_slowpath_common+0x81/0x9b
[ 1278.593438] [] ? mark_free.part.0+0x3b/0x53 [i915]
[ 1278.593439] [] warn_slowpath_fmt+0x46/0x48
[ 1278.593448] [] mark_free.part.0+0x3b/0x53 [i915]
[ 1278.593457] [] i915_gem_evict_something+0x127/0x2c3 [i915]
[ 1278.593467] [] i915_gem_object_pin_view+0x3c0/0x673 [i915]
[ 1278.593476] [] i915_switch_context+0x19a/0x739 [i915]
[ 1278.593485] [] i915_gem_ringbuffer_submission+0x22e/0x7c1 [i915]
[ 1278.593494] [] i915_gem_do_execbuffer.isra.12+0xcdf/0xdbf [i915]
[ 1278.593496] [] ? retint_restore_args+0xe/0xe
[ 1278.593498] [] ? trace_hardirqs_on_caller+0x16e/0x18a
[ 1278.593501] [] ? trace_hardirqs_on_thunk+0x3a/0x3f
[ 1278.593509] [] i915_gem_execbuffer2+0x192/0x24e [i915]
[ 1278.593516] [] drm_ioctl+0x385/0x404 [drm]
[ 1278.593524] [] ? i915_gem_execbuffer+0x382/0x382 [i915]
[ 1278.593526] [] ? mntput_no_expire+0x5f/0x1c2
[ 1278.593527] [] ? mntput_no_expire+0x5/0x1c2
[ 1278.593530] [] ? dput+0x14e/0x16b
[ 1278.593531] [] do_vfs_ioctl+0x3a3/0x46c
[ 1278.593534] [] ? ____fput+0xe/0x10
[ 1278.593535] [] ? retint_swapgs+0xe/0x13
[ 1278.593537] [] SyS_ioctl+0x53/0x81
[ 1278.593538] [] system_call_fastpath+0x12/0x17
[ 1278.593540] ---[ end trace 69a881f67890e137 ]---
[ 1278.606790] ------------[ cut here ]------------


==Bisect results from PRTS==
----------------------------
commit 78a423772d08eb5a048765a883b5b5a308ea0d0f
Author:     Brad Volkin <bradley.d.volkin at intel.com>
AuthorDate: Thu Dec 11 12:13:09 2014 -0800
Commit:     Daniel Vetter <daniel.vetter at ffwll.ch>
CommitDate: Tue Dec 16 10:39:09 2014 +0100

    drm/i915: Use batch pools with the command parser

    This patch sets up all of the tracking and copying necessary to
    use batch pools with the command parser and dispatches the copied
    (shadow) batch to the hardware.

    After this patch, the parser is in 'enabling' mode.

    Note that performance takes a hit from the copy in some cases
    and will likely need some work. At a rough pass, the memcpy
    appears to be the bottleneck. Without having done a deeper
    analysis, two ideas that come to mind are:
    1) Copy sections of the batch at a time, as they are reached
       by parsing. Might improve cache locality.
    2) Copy only up to the userspace-supplied batch length and
       memset the rest of the buffer. Reduces the number of reads.

    v2:
    - Remove setting the capacity of the pool
    - One global pool instead of per-ring pools
    - Replace batch_obj with shadow_batch_obj and hook into eb->vmas
    - Memset any space in the shadow batch beyond what gets copied
    - Rebased on execlist prep refactoring

    v3:
    - Rebase on chained batch handling
    - Squash in setting the secure dispatch flag
    - Add a note about the interaction w/secure dispatch pinning
    - Check for request->batch_obj == NULL in i915_gem_free_request

    v4:
    - Fix read domains for shadow_batch_obj
    - Remove the set_to_gtt_domain call from i915_parse_cmds
    - ggtt_pin/unpin in the parser block to simplify error handling
    - Check USES_FULL_PPGTT before setting DISPATCH_SECURE flag
    - Remove i915_gem_batch_pool_put calls

    v5:
    - Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after
      the parser (danvet, from v4 0/7 feedback)

    Issue: VIZ-4719
    Signed-off-by: Brad Volkin <bradley.d.volkin at intel.com>
    Reviewed-By: Jon Bloomfield <jon.bloomfield at intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

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