[Bug 74861] [hsw regression] Fast audio playback on Intel Haswell HDMI due to runtime pm

[bugzilla-daemon at bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=74861

--- Comment #42 from Mengdong Lin <mengdong.lin at intel.com> ---
Hi Daniel,

Could you change the code to program fix M/N value to EM4/EM5 regsiter like
this?

static void haswell_restore_bclk(struct azx *chip)
{
    struct hda_intel *hda = container_of(chip, struct hda_intel, chip);

    //azx_writew(chip, EM4, hda->bclk_m);
    //azx_writew(chip, EM5, hda->bclk_n);
    azx_writew(chip, EM4, 0x4);
    azx_writew(chip, EM5, 0x5a);
}

The 0X4/0X5a is for 540MhZ CDLCK.

We found the previos patch is not always reliable:
If only embedded DP is connected on boot, the gfx driver will turn off the
display power well on boot case before the audio driver probes and request this
power. So the M/V values programmed by BIOS in EM4/5 registers will be lost at
the very beginning. And so the audio driver will save invalid M/N values on
suspend and restore these invalid values on resume. 
One phenomenon is: if HDMI or DP monitor is connected after boot, audio
playback rate is ~20% faster than normal.

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