[Bug 84886] New: [BDW Bisected]igt/pm_rc6_residency/residency-accuracy fails

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=84886

            Bug ID: 84886
           Summary: [BDW Bisected]igt/pm_rc6_residency/residency-accuracy
                    fails
           Product: DRI
           Version: unspecified
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: high
         Component: DRM/Intel
          Assignee: intel-gfx-bugs at lists.freedesktop.org
          Reporter: jinxianx.guo at intel.com
        QA Contact: intel-gfx-bugs at lists.freedesktop.org
                CC: intel-gfx-bugs at lists.freedesktop.org

==System Environment==
--------------------------
Regression: Yes. 

Non-working platforms: BDW

==kernel==
--------------------------
origin/drm-intel-nightly: ea4bec8e96ea8b33b49a7892c1c7f20041a56da6(fails)
    drm-intel-nightly: 2014y-10m-09d-07h-58m-45s UTC integration manifest


==Bug detailed description==
igt/pm_rc6_residency/residency-accuracy fails

Output:
IGT-Version: 1.8-g7f82289 (x86_64) (Linux: 3.17.0_prts_ff1ea7_20141009_debug+
x86_64)
Test assertion failure function readit, file pm_rc6_residency.c:48:
Failed assertion: file
Last errno: 2, No such file or directory
Subtest residency-accuracy: FAIL


==Reproduce steps==
---------------------------- 
1. ./pm_rc6_residency --run-subtest residency-accuracy

==Bisect results from PRTS==
----------------------------
Bisect shows: bb530a44ceaec228bdf7329e303875d2cc82c115 is the first bad commit

commit bb530a44ceaec228bdf7329e303875d2cc82c115
Author:     Rodrigo Vivi <rodrigo.vivi at intel.com>
AuthorDate: Tue Oct 7 07:06:50 2014 -0700
Commit:     Daniel Vetter <daniel.vetter at ffwll.ch>
CommitDate: Wed Oct 8 11:22:39 2014 +0200

    drm/i915: Do not export RC6p and RC6pp if they don't exist

    Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
    So powertop can be changed to show RC6p and RC6pp only on the platforms
    they are available.

    v2: Simplify by merging RC6p and RC6pp groups and respect the spec that
    mentions deep and deepest RC6 on SNB and IVB although they keep disabled
    by default.

    v3: Remove unecessary space.

    v4: RC6p and RC6pp is only for SNB and IVB; unify debug msg and use
        has_rc6p() on sanitize options instead of is gen 6 and ivb.

    v5: yet another fix on has_rc6p macro. final is_gen6 or is_ivb! To make
sure
        we are excluding hsw and baytrail.

    References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
    Cc: Josh Triplett <josh.triplett at intel.com>
    Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are on the CC list for the bug.
You are the assignee for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-gfx-bugs/attachments/20141011/9991c7c6/attachment.html>