[Bug 88012] [bisected BYT] complete freeze after: drm/i915/vlv: WA for Turbo and RC6 to work together

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=88012

--- Comment #33 from Deepak S <deepak.s at intel.com> ---
Hi Jesse,

I am suspecing the voltage change after GPU frequencey request.

Can we try below options.
1. Keep the frquency at min (RPn) & run the workload. This will ensure we run
at contant GPU voltage.
a) cat /sys/class/drm/card0/gt_RPn_freq_mhz
b) echo "value from above cmd" >/sys/class/drm/card0/gt_max_freq_mhz

2) Switch back to legacy turbo. 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 9baecb7..0dac413 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4292,12 +4292,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
        INIT_WORK(&dev_priv->rps.work, gen6_pm_rps_work);
        INIT_WORK(&dev_priv->l3_parity.error_work, ivybridge_parity_work);

-       /* Let's track the enabled rps events */
-       if (IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
-               /* WaGsvRC0ResidencyMethod:vlv */
-               dev_priv->pm_rps_events = GEN6_PM_RP_UP_EI_EXPIRED;
-       else
-               dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS;
+       dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS;

        INIT_DELAYED_WORK(&dev_priv->gpu_error.hangcheck_work,
                          i915_hangcheck_elapsed);

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