[Bug 95472] [i915] Feature request: Add support for fencing for PRIME setups

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=95472

--- Comment #31 from Michel Dänzer <michel at daenzer.net> ---
FWIW, I wouldn't test with DRI2, because that uses a single shared buffer. Even
if there is proper synchronization between the dGPU rendering and the iGPU
reading its output, I suspect there may be nothing preventing the dGPU from
rendering the next frame before the iGPU is done reading the previous one.

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