[Bug 91393] [bdw edp] Screen Flickering

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=91393

--- Comment #90 from Mika Kahola <mika.kahola at intel.com> ---
Created attachment 122497
  --> https://bugs.freedesktop.org/attachment.cgi?id=122497&action=edit
Cache DP signal levels

In your case, when DP link is retrained with the settings from previous link
training the clock recovery fails. This leads into a situation where link
training is started from scratch. However, now the clock recovery seems to be
happy with the lower voltage swing and pre-emphasis settings than with the
first iteration round. You may experience flickering due to this as the
physical link may require higher voltage swing or pre-emphasis than provided.

We could try the following trick here. Let's cache the signal levels and in
case of link retraining we retrain the link until we have reached the
previously trained signal levels and clock recovery is reached.

Please, give this a go on top of the latest drm-intel-nightly with these 3
patches applied. Dmesg logs are appreciated too ;)

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