[Bug 98251] [ILK][BAT] kms_pipe_crc_basic/nonblocking-crc-pipe-b underrun Dmesg Warnings

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=98251

--- Comment #2 from Ville Syrjala <ville.syrjala at linux.intel.com> ---
OK, so at leas some of these seem to spurious underruns caused by link
retraining:

[  424.719905] [drm:drm_helper_probe_single_connector_modes]
[CONNECTOR:40:DP-1]
[  424.719939] [drm:intel_dp_detect [i915]] [CONNECTOR:40:DP-1]
[  424.720429] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02
02 06 00 00 00 00
[  424.720769] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source
no, sink no
[  424.720787] [drm:intel_dp_print_rates [i915]] source rates: 162000, 270000
[  424.720803] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
[  424.720819] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
[  424.721438] [drm:intel_dp_check_link_status [i915]] DP C: channel EQ not ok,
retraining
[  424.721802] [drm:intel_dp_set_signal_levels [i915]] Using signal levels
00000000
[  424.721818] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
[  424.721834] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level
0
[  424.721851] [drm:intel_dp_program_link_training_pattern [i915]] Using DP
training pattern TPS1
[  424.722556] [drm:intel_dp_set_signal_levels [i915]] Using signal levels
02000000
[  424.722601] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
[  424.722642] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level
0
[  424.723391] [drm:intel_dp_set_signal_levels [i915]] Using signal levels
04000000
[  424.723435] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
[  424.723477] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level
0
[  424.724197] [drm:intel_dp_start_link_train [i915]] Max Voltage Swing reached
[  424.724241] [drm:intel_dp_program_link_training_pattern [i915]] Using DP
training pattern TPS2
[  424.725273] [drm:intel_dp_dump_link_status [i915]] ln0_1:0x0 ln2_3:0x0
align:0x80 sink:0x0 adj_req0_1:0x77 adj_req2_3:0x77
[  424.725316] [drm:intel_dp_start_link_train [i915]] Clock recovery check
failed, cannot continue channel equalization
[  424.725915] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU
pipe B FIFO underrun
[  424.726056] [drm:intel_pch_fifo_underrun_irq_handler [i915]] *ERROR* PCH
transcoder B FIFO underrun
[  424.726217] [drm:drm_edid_to_eld] ELD monitor LEN LT2452pwC
[  424.726220] [drm:drm_edid_to_eld] ELD size 36, SAD count 1

I'm going to see about just suppressing those.

There are a few PCH underruns visible at the end of modesets as well though.
Those may or may not be spurious. One observation I can make is that the
monitor in question has audio support, so it might be we really need to add
those spec mandated vblank waits to the audio enable path. I just never was
able to reproduce such issues on my machines, and so I didn't find any benefit
from adding them.

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