[Bug 91883] [HSW, BDW, SKL] [drm:intel_pipe_update_end [i915]] *ERROR* Atomic update failure on pipe A

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=91883

--- Comment #65 from syphyr at gmail.com ---
I have been able to reproduce the error with kernel 4.12.9:

https://vomitb.in/cptm53M3GH

[SNIP]
[15499.129935] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
[15499.130025] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DDI B]
[15499.130163] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI C]
[15499.130249] [drm:intel_atomic_commit_tail [i915]] [ENCODER:61:DP-MST A]
[15499.130336] [drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DP-MST B]
[15499.130409] [drm:intel_atomic_commit_tail [i915]] [ENCODER:63:DP-MST C]
[15499.130500] [drm:verify_single_dpll_state.isra.110 [i915]] DPLL 0
[15499.130586] [drm:verify_single_dpll_state.isra.110 [i915]] DPLL 1
[15499.130671] [drm:verify_single_dpll_state.isra.110 [i915]] DPLL 2
[15499.130756] [drm:verify_single_dpll_state.isra.110 [i915]] DPLL 3
[15499.130858] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1,
on? 0) for crtc 32
[15499.130953] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
[15499.131074] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
[15499.131176] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
[15499.131329] [drm:wait_panel_status [i915]] mask b800000f value 00000000
status 00000000 control 00000000
[15499.131431] [drm:wait_panel_status [i915]] Wait complete
[15499.131558] [drm:edp_panel_on [i915]] Wait for panel power on
[15499.131634] [drm:wait_panel_status [i915]] mask b000000f value 80000008
status 9000000a control 00000003
[15499.232650] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat
0x01000000, dig 0x12101010, pins 0x00000010
[15499.232761] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
[15499.232860] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN
4 - cnt: 0
[15499.233027] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
[15499.332905] [drm:wait_panel_status [i915]] Wait complete
[15499.332995] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power
well
[15499.333071] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
[15499.333192] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
[15499.333327] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL:
0x0000000b
[15499.334602] [drm:intel_dp_set_signal_levels [i915]] Using signal levels
00000000
[15499.334697] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
[15499.334784] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level
0
[15499.334866] [drm:intel_dp_program_link_training_pattern [i915]] Using DP
training pattern TPS1
[15499.335624] [drm:intel_dp_start_link_train [i915]] clock recovery OK
[15499.335699] [drm:intel_dp_program_link_training_pattern [i915]] Using DP
training pattern TPS2
[15499.336745] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP
Training successful
[15499.337172] [drm:intel_enable_pipe [i915]] enabling pipe A
[15499.337287] [drm:intel_edp_backlight_on.part.25 [i915]] 
[15499.337368] [drm:intel_panel_enable_backlight [i915]] pipe A
[15499.337502] [drm:intel_panel_actually_set_backlight [i915]] set backlight
PWM = 739
[15499.342260] [drm:intel_psr_enable [i915]] PSR not supported by this panel
[15499.342364] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
[15499.354225] [drm:verify_connector_state.isra.80 [i915]] [CONNECTOR:48:eDP-1]
[15499.354342] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
[15499.354464] [drm:verify_single_dpll_state.isra.110 [i915]] DPLL 0
[15499.371017] [drm:intel_backlight_device_update_status [i915]] updating
intel_backlight, brightness=739/937
[15499.371123] [drm:intel_panel_actually_set_backlight [i915]] set backlight
PWM = 739
[15502.362297] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
[15502.362443] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008
PP_CONTROL: 0x00000007
[15502.362520] [drm:intel_power_well_disable [i915]] disabling DC off
[15502.362596] [drm:skl_enable_dc6 [i915]] Enabling DC6
[15502.362667] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
[24504.516217] input: 00:1E:7C:35:C3:80 as /devices/virtual/input/input18
[26472.201979] [drm:intel_pipe_update_end [i915]] *ERROR* Atomic update failure
on pipe A (start=658529 end=658530) time 161 us, min 1073, max 1079, scanline
start 1070, end 1082
[SNIP]

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