[Bug 96996] [BYT][VLV] No picture on DSI display after DRM loads on Teclast X80H tablet

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=96996

--- Comment #14 from Stephan Schorn <mail at schorn-stephan.de> ---
I compared the working dmesgs with the non-working dmesgs.

4.6.7 Kernel with fastboot=1 from Laszlo Fiat
[drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 50
[drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0,
ms 0
[drm:drm_atomic_commit] commiting ffff88007529e400
[drm:intel_update_pipe_config] Updating pipe size 800x1280 -> 800x1280
[drm:intel_connector_check_state] [CONNECTOR:46:DSI-1]
[drm:intel_dsi_get_hw_state] 

4.6.7 Kernel with fastboot=0 from Laszlo Fiat
[drm:intel_modeset_checks] New cdclk calculated to be atomic 266667, actual
266667
[drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 50
[drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 1, on 1,
ms 1
[drm:drm_atomic_commit] commiting ffff880036c03a00
[drm:intel_set_memory_cxsr] memory self-refresh is disabled
[drm:intel_set_memory_cxsr] memory self-refresh is disabled
[drm:intel_dsi_pre_disable] 
[drm:intel_disable_pipe] disabling pipe A

4.9.0 Kernel with fastboot=0 from Laszlo Fiat
[drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667,
actual 266667
[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has
[PLANE:25:primary A] with fb 60
[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 1 ->
1, off 1, on 1, ms 1
[drm:drm_atomic_commit [drm]] commiting ffff963535f88800
[drm:_intel_set_memory_cxsr [i915]] memory self-refresh is disabled (was
disabled)
[drm:intel_dsi_pre_disable [i915]] 
[drm:intel_disable_pipe [i915]] disabling pipe A

4.10.0 Kernel with fastboot=0 from me
[drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667,
actual 266667
[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has
[PLANE:25:primary A] with fb 60
[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 1 ->
1, off 1, on 1, ms 1
[drm:drm_atomic_commit [drm]] commiting ffff97c4b5124c00
[drm:_intel_set_memory_cxsr [i915]] memory self-refresh is disabled (was
disabled)
[drm:intel_dsi_pre_disable [i915]] 
[drm:intel_disable_pipe [i915]] disabling pipe A

4.10.0 Kernel with fastboot=1 from me
[drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667,
actual 266667
[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has
[PLANE:25:primary A] with fb 60
[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 1 ->
1, off 1, on 1, ms 1
[drm:drm_atomic_commit [drm]] commiting ffff8907f567f400
[drm:_intel_set_memory_cxsr [i915]] memory self-refresh is disabled (was
disabled)
[drm:intel_dsi_pre_disable [i915]] 
[drm:intel_disable_pipe [i915]] disabling pipe A


If you boot with fastboot, the modeset_checks a.k.a atomic_checks didn't
happen, but they do now.
They cause off, on and ms to change from 0 to 1. And they cause this strange
"corretion" of the value 266667 to 266667.

So, I think the error is in this check routine.
Although, it doesnt't seem to be related with my resolution idea.

http://lxr.free-electrons.com/source/drivers/gpu/drm/i915/intel_display.c#L14006
http://lxr.free-electrons.com/source/drivers/gpu/drm/i915/intel_display.c#L13921

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