[Bug 103260] [CI] igt at gem_eio@in-flight-suspend - dmesg-warn - WARNING: CPU: 4 PID: 1503 at drivers/gpu/drm/i915/intel_ringbuffer.c

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=103260

--- Comment #2 from Chris Wilson <chris at chris-wilson.co.uk> ---
<7>[   41.696323] [drm:missed_breadcrumb [i915]] rcs0 missed breadcrumb at
intel_breadcrumbs_hangcheck+0x61/0x80 [i915], irq posted? no, current
seqno=cf3a, last=cf7c
<7>[   49.696247] [drm:i915_reset_device [i915]] resetting chip
<5>[   49.696598] i915 0000:00:02.0: Resetting chip after gpu hang
<7>[   49.697285] [drm:i915_reset [i915]] GPU reset disabled
...
<4>[   54.749897] WARN_ON((dev_priv->uncore.funcs.mmio_readl(dev_priv, (((const
i915_reg_t){ .reg = (((engine)->mmio_base)+0x9c) })), true) & (1 << 9)) == 0)
<4>[   54.749918] ------------[ cut here ]------------
<4>[   54.749968] WARNING: CPU: 4 PID: 1503 at
drivers/gpu/drm/i915/intel_ringbuffer.c:448 init_ring_common+0x606/0x610 [i915]

So at a basic level it is a side-effect of the test. As we disable the GPU
reset to cause the EIO, the ring is not idle when we try to restart it.

It looks like we can (a) always do stop-rings upon reset regardless of the
availability of the GPU reset, and (b) extend the stop-ring coverage in
init_ring_common() to not clear the STOP bit until after we are ready to
restart.

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