[Bug 103484] New: SSEU status is all 0 on BXT

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=103484

            Bug ID: 103484
           Summary: SSEU status is all 0 on BXT
           Product: DRI
           Version: DRI git
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: medium
         Component: DRM/Intel
          Assignee: intel-gfx-bugs at lists.freedesktop.org
          Reporter: lionel.g.landwerlin at linux.intel.com
        QA Contact: intel-gfx-bugs at lists.freedesktop.org
                CC: intel-gfx-bugs at lists.freedesktop.org

I have a BXT/APL 2x6 PCIID: 0x5a85

cat /sys/kernel/debug/dri/0/i915_sseu_status
SSEU Device Info
  Available Slice Mask: 0001
  Available Slice Total: 1
  Available Subslice Total: 2
  Available Slice0 Subslice Mask: 0006
  Available EU Total: 12
  Available EU Per Subslice: 6
  Has Pooled EU: no
  Has Slice Power Gating: no
  Has Subslice Power Gating: yes
  Has EU Power Gating: yes
SSEU Device Status
  Enabled Slice Mask: 0000
  Enabled Slice Total: 0
  Enabled Subslice Total: 0
  Enabled EU Total: 0
  Enabled EU Per Subslice: 0

It's not really critical.
I couldn't find anything in the documentation that says we should read the
power gating in a different way from other gen9 platforms.
I also verified we actually program the slice/subslice power gating, so it
seems like we should get the ack.

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