[Bug 102899] [IGT] gem_ringfill at bsd-S4 fail with rtcwake failed with 256

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=102899

--- Comment #3 from Elizabeth <elizabethx.de.la.torre.mena at intel.com> ---
>From dmesg:
[ 1913.747680] [drm:intel_enable_pipe [i915]] enabling pipe C
[ 1913.747729] [drm:intel_hdmi_handle_sink_scrambling [i915]] Setting sink
scrambling for enc:DDI C connector:HDMI-A-2
[ 1913.749337] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr:
0054 w(1)
[ 1913.749386] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first
message, retry
[ 1913.751332] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr:
0054 w(1)
[ 1913.751361] [drm:drm_scdc_set_high_tmds_clock_ratio] *ERROR* Failed to read
TMDS config: -6
[ 1913.751404] [drm:intel_hdmi_handle_sink_scrambling [i915]] *ERROR* Set TMDS
ratio failed
[ 1913.751451] [drm:intel_audio_codec_enable [i915]] ELD on
[CONNECTOR:91:HDMI-A-2], [ENCODER:90:DDI C]
[ 1913.751496] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe
C, 32 bytes ELD
[ 1913.751544] [drm:audio_config_hdmi_pixel_clock.isra.3 [i915]] HDMI audio
pixel clock setting for 533250 not found, falling back to defaults
[ 1913.751591] [drm:audio_config_hdmi_pixel_clock.isra.3 [i915]] Configuring
HDMI audio for pixel clock 25200 (0x00010000)
[ 1913.751636] [drm:hsw_audio_config_update [i915]] using automatic N

It repeats for pipe A, B and C. And then there is the hang:

[ 3232.953345] [drm] GPU HANG: ecode 9:0:0xfffffffe, reason: Manually setting
wedged to 18446744073709551615, action: reset
[ 3232.953383] [drm] GPU hangs can indicate a bug anywhere in the entire gfx
stack, including userspace.
[ 3232.953585] [drm] Please file a _new_ bug report on bugs.freedesktop.org
against DRI -> DRM/Intel
[ 3232.953614] [drm] drm/i915 developers can then reassign to the right
component if it's not a kernel issue.
[ 3232.953643] [drm] The gpu crash dump is required to analyze gpu hangs, so
please always attach it.
[ 3232.953670] [drm] GPU crash dump saved to /sys/class/drm/card0/error
[ 3232.953849] [drm:i915_reset_device [i915]] resetting chip
[ 3232.953926] i915 0000:00:02.0: Resetting chip after gpu hang
[ 3232.956285] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
[ 3232.956387] [drm:init_workarounds_ring [i915]] rcs0: Number of context
specific w/a: 12
[ 3232.956540] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
[ 3232.956688] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
[ 3232.956832] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
[ 3232.957916] [IGT] gem_eio: starting subtest in-flight
[ 3232.958163] Setting dangerous option reset - tainting kernel
[ 3232.958973] [drm] RC6 on
[ 3234.720287] [drm:missed_breadcrumb [i915]] rcs0 missed breadcrumb at
intel_breadcrumbs_hangcheck+0x5c/0x80 [i915], irq posted? yes, current seqno=0,
last=41
[ 3234.720708] [drm:i915_reset_device [i915]] resetting chip
[ 3234.720758] i915 0000:00:02.0: Resetting chip after gpu hang
[ 3234.721198] [drm:i915_reset [i915]] GPU reset disabled
[ 3234.722765] Setting dangerous option reset - tainting kernel
[ 3234.722947] [drm:i915_reset_device [i915]] resetting chip
[ 3234.723039] i915 0000:00:02.0: Resetting chip after gpu hang

Would the file /sys/class/drm/card0/error be useful?

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