[Bug 103774] [CI] igt@*suspend* - dmesg-warn - *ERROR* timeout during PHY[01]

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Fri Apr 20 13:50:25 UTC 2018


https://bugs.freedesktop.org/show_bug.cgi?id=103774

Martin Peres <martin.peres at free.fr> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|[CI]                        |[CI] igt@*suspend* -
                   |igt at kms_flip@vblank-vs-mode |dmesg-warn - *ERROR*
                   |set-suspend - dmesg-warn -  |timeout during PHY[01]
                   |*ERROR* timeout during PHY1 |
         Resolution|WORKSFORME                  |---
             Status|CLOSED                      |REOPENED

--- Comment #3 from Martin Peres <martin.peres at free.fr> ---
(In reply to Marta Löfstedt from comment #2)
> Last seen CI_DRM_3604: 2018-01-05 / 110 runs ago

Starting from the begining of April, it has become visible again:

https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4402/shard-glkb4/igt@pm_rpm@system-suspend.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4045/shard-glk1/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4045/shard-glk3/igt@gem_eio@in-flight-suspend.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4046/shard-glk3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4051/shard-glk2/igt@gem_softpin@noreloc-s3.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4052/shard-glk4/igt@gem_softpin@noreloc-s3.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4053/shard-glk3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4055/shard-glk4/igt@gem_softpin@noreloc-s3.html

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4061/shard-glk2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

[  278.230808] [drm:_bxt_ddi_phy_init [i915]] *ERROR* timeout during PHY0 power
on

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