[Bug 107338] [CI][BAT] igt at gem_workarounds@basic-read - fail - Failed assertion: workaround_fail_count(fd, ctx) == 0

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=107338

Chris Wilson <chris at chris-wilson.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #2 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit c358514ba8da9e235876db1628cedd19a35803c6
Author: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Date:   Mon Jul 30 15:06:36 2018 +0300

    Revert "drm/i915/icl: WaEnableFloatBlendOptimization"

    The register for 0xe420 is unable to hold any value, including
    this bit. The documentation is also mixed between having a
    register bit for toggle and having a state command setup
    for it. Apparently the register toggle is deprecated.

    Remove the register toggle as evidence shows it's futile.

    The thing remaining is an apology and humble request for
    Mesa folks to resurrect their state setup for this as they
    were on right track from start.

    This reverts commit 0bf059f3532bb39c52d917142206a8554fc2f1c5.

    Fixes: 0bf059f3532b ("drm/i915/icl: WaEnableFloatBlendOptimization")
    References: HSDES#1406393558
    Cc: Oscar Mateo <oscar.mateo at intel.com>
    Cc: Anuj Phogat <anuj.phogat at gmail.com>
    Cc: Chris Wilson <chris at chris-wilson.co.uk>
    Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
    Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
    Link:
https://patchwork.freedesktop.org/patch/msgid/20180730120636.26958-1-mika.kuoppala@linux.intel.com

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