[Bug 107500] [CI][SHARDS] igt at gem_eio@reset-stress - fail - Failed assertion: elapsed < 250e6
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Wed Aug 8 16:19:41 UTC 2018
https://bugs.freedesktop.org/show_bug.cgi?id=107500
Chris Wilson <chris at chris-wilson.co.uk> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
--- Comment #3 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit a4a717010f4e8cacaa3f0cae8a22f25c39ae1d41
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Aug 8 11:51:00 2018 +0100
drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw
An oddity occurs on Sandybridge, Ivybridge and Haswell (and presumably
Valleyview) in that for the period following the GPU restart after a
reset, there are no GT interrupts received. From Ville's notes, bit 0 in
the HWSTAM corresponds to the render interrupt, and if we unmask it we
do see immediate resumption of GT interrupt delivery (via the master irq
handler) after the reset.
v2: Limit the w/a to the render interrupt from rcs
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107500
Fixes: c5498089463b ("drm/i915: Mask everything in ring HWSTAM on gen6+ in
ringbuffer mode")
References: d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")
Testcase: igt/gem_eio/reset-stress
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
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