[Bug 107759] [CI][DRMTIP] igt at prime_mmap_coherency@ioctl-errors - fail - Failed assertion: !(ptr2_cpu[i] != 0x11111111)

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=107759

Chris Wilson <chris at chris-wilson.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #3 from Chris Wilson <chris at chris-wilson.co.uk> ---
Hoping resolved by

commit 70b73f9ac113983f9c7db9887447f1344ac5b69b (HEAD -> drm-intel-next-queued,
drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Thu Aug 30 17:10:42 2018 +0100

    drm/i915/ringbuffer: Delay after invalidating gen6+ xcs

    During stress testing of full-ppgtt (on Baytrail at least), we found
    that the invalidation around a context/mm switch was insufficient (writes
    would go astray). Adding a second MI_FLUSH_DW barrier prevents this, but
    it is unclear as to whether this is merely a delaying tactic or if it is
    truly serialising with the TLB invalidation. Either way, it is
    empirically required.

    v2: Avoid the loop for readability;

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107715
    References: https://bugs.freedesktop.org/show_bug.cgi?id=107759
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
    Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
    Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
    Cc: Matthew Auld <matthew.william.auld at gmail.com>
    Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
    Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
    Link:
https://patchwork.freedesktop.org/patch/msgid/20180830161042.29193-1-chris@chris-wilson.co.uk

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