[Bug 102614] [CI][HSW only] *ERROR* PCH transcoder A FIFO underrun | *ERROR* uncleared pch fifo underrun on pch transcoder A

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=102614

--- Comment #15 from Marta Löfstedt <marta.lofstedt at intel.com> ---
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3835/shard-hsw5/igt@kms_vblank@pipe-a-query-forked-busy-hang.html

from dmesg:
<7>[  829.768537] missed_breadcrumb *
<7>[  829.768549] missed_breadcrumb Idle? no
<7>[  841.736597] [drm:i915_reset_device [i915]] resetting chip
<5>[  841.736895] i915 0000:00:02.0: Resetting chip after gpu hang
<7>[  841.737399] [drm:i915_gem_reset_engine [i915]] resetting rcs0 to restart
from tail of request 0x3
<7>[  841.737992] [drm:sandybridge_pcode_read [i915]] warning: pcode (read from
mbox 5) mailbox access failed for intel_enable_gt_powersave [i915]: -6
<7>[  841.738243] [drm:init_workarounds_ring [i915]] rcs0: Number of context
specific w/a: 0
...
<3>[  841.840039] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR*
uncleared pch fifo underrun on pch transcoder A
<3>[  841.840280] [drm:cpt_irq_handler [i915]] *ERROR* PCH transcoder A FIFO
underrun

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