[Bug 102575] [BAT][GDG] igt at gem_mmap_gtt@basic-small-bo-tiledx - fail - Failed assertion: memcmp(ptr , tiled_pattern, PAGE_SIZE) == 0

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=102575

Martin Peres <martin.peres at free.fr> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|FIXED                       |---
             Status|RESOLVED                    |REOPENED

--- Comment #17 from Martin Peres <martin.peres at free.fr> ---
(In reply to Chris Wilson from comment #16)
> So I thought this was a cpu issue, turns out to be unknown swizzling instead:
> 
> commit a0f2d23b7d3d4226a0a7637a9240bfa86f08c1d3 (HEAD, upstream/master)
> Author: Chris Wilson <chris at chris-wilson.co.uk>
> Date:   Fri Jun 8 17:29:46 2018 +0100
> 
>     igt/gem_mmap_gtt: Checking tiling pattern requires known swizzling
>     
>     As the swizzling is baked into the tiling pattern, the swizzling has to
>     be consistent across the entire GTT mmap for our tests to work. However,
>     under L-shaped memory configurations on older architectures, the
>     swizzling varied depending on which region the page found itself in --
>     invalidating our assumptions and ability to predict the tiling pattern.
>     
>     Reported-by: Adric Blake <promarbler14 at gmail.com>
>     Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106848
>     Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>     Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> Some gdg oddities still remain. Hopefully this will throw some light on to
> them as well.

Still happening, unless the following errors should be in a separate bug:


https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_62/fi-gdg-551/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_62/fi-gdg-551/igt@gem_tiled_pread_pwrite.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_62/fi-gdg-551/igt@gem_tiled_partial_pwrite_pread@writes.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_62/fi-gdg-551/igt@gem_set_tiling_vs_pwrite.html

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