[Bug 100368] [BAT][CI] igt at kms_flip@' - Failed assertion: es->current_seq == es->last_seq + o->seq_step | Failed assertion: ev.sequence == last_seq + 1

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Mon Apr 15 13:33:40 UTC 2019


https://bugs.freedesktop.org/show_bug.cgi?id=100368

--- Comment #64 from Arek Hiler <arkadiusz.hiler at intel.com> ---
(In reply to Martin Peres from comment #63)
> (In reply to Mika Kahola from comment #61)
> > Seems that we are a bit too slow processing in one vblank, especially with
> > the slower machines. It depends on machines capability of scheduling and how
> > well the tasks are executed. Sometimes, it may require more time to complete.
> > 
> > If we fail to fix the test we will take a hit on test coverage. I don't
> > expect any noticeable flickering on userspace to happen, if we fail to
> > complete tasks in one vblank.
> 
> Have you checked that they always fail by 1?

I went through the last 2 weeks and the only other delta I could find is this:

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-snb-2520m/igt@kms_flip@plain-flip-ts-check-interruptible.html

with is 4 vblanks, so no, not always by 1.

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