[Bug 110818] [CI][BAT] igt at i915_selftest@live_mman - timeout - probe of 0000:00:02.0 failed with error
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Tue Jun 4 16:09:01 UTC 2019
https://bugs.freedesktop.org/show_bug.cgi?id=110818
Chris Wilson <chris at chris-wilson.co.uk> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
--- Comment #6 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit 59ec84eca57ab33107f1cd712a183ff5f9e234d8 (HEAD -> drm-intel-next-queued,
drm-intel/for-linux-next, drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Jun 4 13:00:22 2019 +0100
drm/i915: Use unchecked uncore writes to flush the GTT
As the GTT is outside of the powerwell, we can simplify flushing the
GGTT writes by using an unchecked mmio write and post.
v2: s/unc/uncore/
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20190604120022.20472-3-chris@chris-wilson.co.uk
commit 1c8242c3a4b2c1fc36c72c5f479058629f772b65
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Jun 4 13:00:21 2019 +0100
drm/i915: Use unchecked writes for setting up the fences
As the fence registers are not part of the engine powerwells, we do not
need to fiddle with forcewake in order to update a fence. Avoid using
the heavyweight debug checking normal mmio writes as the checking
dominates the selftest runtime and is superfluous!
In the process, retire the I915_WRITE() implicit macro with the new
intel_uncore_write interface.
v2: s/unc/uncore/
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20190604120022.20472-2-chris@chris-wilson.co.uk
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