[Bug 105978] [META] CRC mismatch

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=105978

--- Comment #3 from harish.chegondi at intel.com ---
(In reply to Marta Löfstedt from comment #1)
> bug 102614 
> 
> [  249.764040] [drm:drm_crtc_add_crc_entry] *ERROR* Overflow of CRC buffer,
> userspace reads too slow. 
> 
> maybe a hint for GLK and SKL.

I have noticed the above overflow error message even on BYT. I think this is
the reason for this overflow message: IGT tests that read CRC data usually
start CRC generation, read CRC data, stop CRC generation and validate the CRC
data. Some tests are validating the CRC data even before stopping the CRC
generation. If validating the CRC data results in a mismatch and therefore an
assert, the test may quit without stopping the CRC generation. This can cause
the CRC buffer to get filled up and the overflow error message shows up.

For example, here are few lines from tests/kms_pipe_crc_basic.c test which I
think is the correct order - crc is stopped before validating the CRC data. But
there are some tests which validate the CRC data before stopping the CRC. For
example, in tests/kms_rotation_crc.c test_plane_rotation(), CRC data is
validated before stopping the CRC.

From: from tests/kms_pipe_crc_basic.c:
--------------------------------------
pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_pipe_crc_start(pipe_crc);

n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS, &crcs);

igt_pipe_crc_stop(pipe_crc);
igt_pipe_crc_free(pipe_crc);


/* and ensure that they'are all equal, we haven't changed the fb */
for (j = 0; j < (n_crcs - 1); j++)
    igt_assert_crc_equal(&crcs[j], &crcs[j + 1]);

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