[Bug 111214] [CI][BAT] igt at i915_module_load@reload - timeout - Unable to sync register 0x2f8100

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=111214

Chris Wilson <chris at chris-wilson.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|REOPENED                    |RESOLVED

--- Comment #21 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit 1580d3cdddbba4a5ef78a04a5289e32844e6af24
Author: Kai Vehmanen <kai.vehmanen at linux.intel.com>
Date:   Thu Oct 3 11:55:30 2019 +0300

    drm/i915: Fix audio power up sequence for gen10+ display

    On platfroms with gen10+ display, driver must set the enable bit of
    AUDIO_PIN_BUF_CTL register before transactions with the HDA controller
    can proceed. Add setting this bit to the audio power up sequence.

    Failing to do this resulted in errors during display audio codec probe,
    and failures during resume from suspend.

    Note: We may also need to disable the bit afterwards, but there are
    still unresolved issues with that.

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111214
    Signed-off-by: Kai Vehmanen <kai.vehmanen at linux.intel.com>
    Signed-off-by: Jani Nikula <jani.nikula at intel.com>
    Link:
https://patchwork.freedesktop.org/patch/msgid/20191003085531.30990-1-kai.vehmanen@linux.intel.com

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