[Bug 111723] [CI][RESUME] igt at gem_mocs_settings@mocs-.*-render - fail - Failed assertion: read_regs[index] & 0xffff == table.table[index * 2].l3cc_value

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=111723

Chris Wilson <chris at chris-wilson.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #5 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit eca0b72089695d5b19c8c2b287ac3f6fbe79197e (HEAD -> drm-intel-next-queued,
drm-intel/drm-intel-next-queued)
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Wed Oct 16 10:07:49 2019 +0100

    drm/i915: Do initial mocs configuration directly

    Now that we record the default "goldenstate" context, we do not need to
    emit the mocs registers at the start of each context and can simply do
    mmio before the first context and capture the registers as part of its
    default image. As a consequence, this means that we repeat the mmio
    after each engine reset, fixing up any platform and registers that were
    zapped by the reset (for those platforms with global not context-saved
    settings).

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111723
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111645
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
    Cc: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
    Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
    Link:
https://patchwork.freedesktop.org/patch/msgid/20191016090749.7092-1-chris@chris-wilson.co.uk

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