<html>
<head>
<base href="https://bugs.freedesktop.org/" />
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - fullscreen flickering with google-chrome and youtube"
href="https://bugs.freedesktop.org/show_bug.cgi?id=94987#c4">Comment # 4</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - fullscreen flickering with google-chrome and youtube"
href="https://bugs.freedesktop.org/show_bug.cgi?id=94987">bug 94987</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>Ok, try patching it out of mesa as well:
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 60b696c..522a75a 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2864,13 +2864,13 @@ enum brw_wm_barycentric_interp_mode {
* On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
* may still respect that.
*/
-#define GEN7_MOCS_L3 1
+#define GEN7_MOCS_L3 0
/* Ivybridge only: cache in LLC.
* Specifying zero here means to use the PTE values set by the kernel;
* non-zero overrides the PTE values.
*/
-#define IVB_MOCS_LLC (1 << 1)
+#define IVB_MOCS_LLC 0
/* Baytrail only: snoop in CPU cache */
#define BYT_MOCS_SNOOP (1 << 1)
If that fails, we have to start questioning the kernel.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the assignee for the bug.</li>
<li>You are the QA Contact for the bug.</li>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>