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<body><span class="vcard"><a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> <span class="fn">Ville Syrjala</span></a>
</span> changed
<a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - Trying to set mode 3840x2160 at 60 Hz results in a crash"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95392">bug 95392</a>
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<th>What</th>
<th>Removed</th>
<th>Added</th>
</tr>
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<td style="text-align:right;">Assignee</td>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
<td>ville.syrjala@linux.intel.com
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<td style="text-align:right;">Status</td>
<td>NEEDINFO
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<td>ASSIGNED
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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - Trying to set mode 3840x2160 at 60 Hz results in a crash"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95392#c8">Comment # 8</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - Trying to set mode 3840x2160 at 60 Hz results in a crash"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95392">bug 95392</a>
from <span class="vcard"><a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> <span class="fn">Ville Syrjala</span></a>
</span></b>
<pre>(In reply to Oli from <a href="show_bug.cgi?id=95392#c7">comment #7</a>)
<span class="quote">> (In reply to Ville Syrjala from <a href="show_bug.cgi?id=95392#c3">comment #3</a>)
> > [ 12.914535] [drm:intel_update_cdclk] Current CD clock rate: 450000 kHz
> > [ 91.861529] [drm:intel_dump_crtc_timings] crtc timings: 533280 3840 3848
> > 3992 4000 2160 2214 2219 2222, type: 0x0 flags: 0x9
> >
> > Your cdclk is too low for that mode. I have a branch which has the required
> > bits to adjust cdclk dynamically on SKL:
> > git://github.com/vsyrjala/linux.git skl_bxt_cdclk_part_2
> >
> > Can you test with that branch?
>
> I did and it seems to works, at least the display didn't blank and xrandr
> reports 60 Hz. Though, I have no way to tell if this is really the case,
> because my display won't show this information.
>
> See the attached dmesg output for more information. I used the same
> drm.debug settings as before.</span >
[ 9.195675] [drm:intel_update_cdclk] Current CD clock rate: 450000 kHz, VCO:
8100000 kHz, ref: 24000 kHz
[ 9.195677] [drm:intel_update_max_cdclk] Max CD clock rate: 675000 kHz
[ 9.195678] [drm:intel_update_max_cdclk] Max dotclock rate: 675000 kHz
[ 70.790172] [drm:intel_dump_crtc_timings] crtc timings: 533280 3840 3848
3992 4000 2160 2214 2219 2222, type: 0x0 flags: 0x9
[ 70.790188] [drm:intel_modeset_checks] New cdclk calculated to be atomic
540000, actual 540000
[ 71.866294] [drm:skl_set_cdclk] Changing CDCLK to 540000 kHz (VCO 8100000
kHz)
[ 71.872408] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz, VCO:
8100000 kHz, ref: 24000 kHz
So everything is looking good.
<span class="quote">>
> PS: Is this fix going upstream some time?</span >
It's being reviewed now, so should land soonish, I hope.</pre>
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