<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - Trying to set mode 3840x2160 at 60 Hz results in a crash"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95392#c10">Comment # 10</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - Trying to set mode 3840x2160 at 60 Hz results in a crash"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95392">bug 95392</a>
from <span class="vcard"><a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> <span class="fn">Ville Syrjala</span></a>
</span></b>
<pre>(In reply to Oli from <a href="show_bug.cgi?id=95392#c9">comment #9</a>)
<span class="quote">> (In reply to Ville Syrjala from <a href="show_bug.cgi?id=95392#c8">comment #8</a>)
> > (In reply to Oli from <a href="show_bug.cgi?id=95392#c7">comment #7</a>)
> > > (In reply to Ville Syrjala from <a href="show_bug.cgi?id=95392#c3">comment #3</a>)
> > > > [ 12.914535] [drm:intel_update_cdclk] Current CD clock rate: 450000 kHz
> > > > [ 91.861529] [drm:intel_dump_crtc_timings] crtc timings: 533280 3840 3848
> > > > 3992 4000 2160 2214 2219 2222, type: 0x0 flags: 0x9
> > > >
> > > > Your cdclk is too low for that mode. I have a branch which has the required
> > > > bits to adjust cdclk dynamically on SKL:
> > > > git://github.com/vsyrjala/linux.git skl_bxt_cdclk_part_2
> > > >
> > > > Can you test with that branch?
> > >
> > > I did and it seems to works, at least the display didn't blank and xrandr
> > > reports 60 Hz. Though, I have no way to tell if this is really the case,
> > > because my display won't show this information.
> > >
> > > See the attached dmesg output for more information. I used the same
> > > drm.debug settings as before.
> >
> >
> > [ 9.195675] [drm:intel_update_cdclk] Current CD clock rate: 450000 kHz,
> > VCO: 8100000 kHz, ref: 24000 kHz
> > [ 9.195677] [drm:intel_update_max_cdclk] Max CD clock rate: 675000 kHz
> > [ 9.195678] [drm:intel_update_max_cdclk] Max dotclock rate: 675000 kHz
> > [ 70.790172] [drm:intel_dump_crtc_timings] crtc timings: 533280 3840 3848
> > 3992 4000 2160 2214 2219 2222, type: 0x0 flags: 0x9
> > [ 70.790188] [drm:intel_modeset_checks] New cdclk calculated to be atomic
> > 540000, actual 540000
> > [ 71.866294] [drm:skl_set_cdclk] Changing CDCLK to 540000 kHz (VCO 8100000
> > kHz)
> > [ 71.872408] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz,
> > VCO: 8100000 kHz, ref: 24000 kHz
> >
> > So everything is looking good.
> >
> > >
> > > PS: Is this fix going upstream some time?
> >
> > It's being reviewed now, so should land soonish, I hope.
>
> This has not really something to do with the bug, but how are these numbers
> to interpret? I mean, shouldn't there be something like a '60' somewhere?</span >
For the refresh rate? That'd be 'dotclock/htotal/vtotal' so in this case
533280*1000/4000/2222 = 60.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
<li>You are the QA Contact for the bug.</li>
</ul>
</body>
</html>