<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_NEEDINFO "
title="NEEDINFO - [BXT-P] i915 driver overwrites the DDI PHY register for the 1366x768 panel with incorrect values"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95476#c3">Comment # 3</a>
on <a class="bz_bug_link
bz_status_NEEDINFO "
title="NEEDINFO - [BXT-P] i915 driver overwrites the DDI PHY register for the 1366x768 panel with incorrect values"
href="https://bugs.freedesktop.org/show_bug.cgi?id=95476">bug 95476</a>
from <span class="vcard"><a class="email" href="mailto:imre.deak@intel.com" title="Imre Deak <imre.deak@intel.com>"> <span class="fn">Imre Deak</span></a>
</span></b>
<pre>(In reply to Jani Nikula from <a href="show_bug.cgi?id=95476#c2">comment #2</a>)
<span class="quote">> (In reply to Tarun Vyas from <a href="show_bug.cgi?id=95476#c0">comment #0</a>)
> > In the APL platforms, the firmware enables the 1366x768 panels by correctly
> > programming the DDI PHY registers, but this leads to a PHY state mismatch
> > according to the i915 driver because the driver expects to read a value from
> > the PHY registers that differs from what was programmed by the firmware.
> > Hence, the i915 driver goes ahead and reprograms the PHY, incorrectly,
> > causing the DP link training to fail. The i915 driver will need
> > modifications to correct this behavior. Filing this bug to track those
> > modifications.
>
> I get the impression you know where things go wrong; can you give more
> specifics please?
>
> Alternatively, please add 'intel_reg dump' output before and after loading
> the i915 driver, i.e. register dumps with the values programmed by firmware
> and i915, respectively.
>
> The intel_reg tool is part of the intel-gpu-tools package
> <a href="http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/">http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/</a></span >
The problem is caused by incorrect PHY lane staggering setup, not matching the
eDP lane configuration. I'm working on a solution that moves the PHY setup
later where we know already the eDP lane config, so can program the staggering
properly.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the assignee for the bug.</li>
<li>You are on the CC list for the bug.</li>
<li>You are the QA Contact for the bug.</li>
</ul>
</body>
</html>