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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BSW] External HDMI monitor suddenly shows solid color when playing Youtube video at 1080p [fifo underrun]"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97965#c30">Comment # 30</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [BSW] External HDMI monitor suddenly shows solid color when playing Youtube video at 1080p [fifo underrun]"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97965">bug 97965</a>
from <span class="vcard"><a class="email" href="mailto:ykku16dev2@gmail.com" title="Yu Kang Ku <ykku16dev2@gmail.com>"> <span class="fn">Yu Kang Ku</span></a>
</span></b>
<pre>In intel_display.c, there is one difference between valleyview_set_cdclk() and
cherryview_set_cdclk() that seems rather interesting. The following snippet is
in valleyview_set_cdclk() but NOT in cherryview_set_cdclk():
/* adjust self-refresh exit latency value */
val = vlv_bunit_read(dev_priv, BUNIT_REG_BISOC);
val &= ~0x7f;
/*
* For high bandwidth configs, we set a higher latency in the bunit
* so that the core display fetch happens in time to avoid underruns.
*/
if (cdclk == 400000)
val |= 4500 / 250; /* 4.5 usec */
else
val |= 3000 / 250; /* 3.0 usec */
vlv_bunit_write(dev_priv, BUNIT_REG_BISOC, val);
Is this snippet applicable to BSW?</pre>
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