<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [SKL] 5k tiled monitor DP sync issues"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97244#c6">Comment # 6</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [SKL] 5k tiled monitor DP sync issues"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97244">bug 97244</a>
from <span class="vcard"><a class="email" href="mailto:andrew@modulus.org" title="Andrew Snow <andrew@modulus.org>"> <span class="fn">Andrew Snow</span></a>
</span></b>
<pre>
Same problem here with Dell 5K and a Skylake i915 cpu/gpu.
I think the problem is that the intel driver is assigning seperate PLLs for
each port. The capability exists to share a common PLL clock source for both
ports.
I suspect the Windows driver sees both ports have the same resolution and
framerate and shares a PLL automatically.
Is there a way to force PLL sharing to test this theory?</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the assignee for the bug.</li>
<li>You are the QA Contact for the bug.</li>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>