<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - GPU hang with libva (gstreamer)" href="https://bugs.freedesktop.org/show_bug.cgi?id=97872#c16">Comment # 16</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - GPU hang with libva (gstreamer)" href="https://bugs.freedesktop.org/show_bug.cgi?id=97872">bug 97872</a> from <a class="email" href="mailto:haihao.xiang@intel.com" title="haihao <haihao.xiang@intel.com>"> haihao</a> <pre>(In reply to Sean V Kelley from <a href="show_bug.cgi?id=97872#c13">comment #13</a>) > Haihao, > > The 2nd VDBOX on SKL is not a complete VDBOX, it only contains MFX. I would > recommend shunting all MFX workloads to the 2nd VDBOX and using the 1st > VDBOX for HCP, VDENC, HuC. Usually user doesn't use different codecs at the same time. I don't think using BSD1 only for MFX is better choice for VP8/H264/MPEG2 etc. > What we need for a permanent fix is an i915 > kernel patch that manages the loads between the engines based on input from > UMD. Currently i915 kernel can manage the loads between the engines. But i915 kernel doesn't know HCP/HuC commands must be ran from the 2nd ring unless UMD driver can tell the kernel. which is why I915_EXEC_BSD_RING1 and I915_EXEC_BSD_RING2 are added to the execution ioctl. > > So, while I find you patch servicable for the immediate need, I want to see > a long term fix along the lines above that I suggest. I will look into the > kernel patch. > > Thanks, > > Sean</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are on the CC list for the bug.</li> </ul> </body> </html>