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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU hang with libva (gstreamer)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97872#c18">Comment # 18</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU hang with libva (gstreamer)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=97872">bug 97872</a>
from <span class="vcard"><a class="email" href="mailto:seanvk@posteo.de" title="Sean V Kelley <seanvk@posteo.de>"> <span class="fn">Sean V Kelley</span></a>
</span></b>
<pre><span class="quote">> On 25 DFómh 2016, at 22:49, <a href="mailto:bugzilla-daemon@freedesktop.org">bugzilla-daemon@freedesktop.org</a> <<a href="mailto:bugzilla-daemon@freedesktop.org">mailto:bugzilla-daemon@freedesktop.org</a>> wrote:
>
>
> <a href="show_bug.cgi?id=97872#c16">Comment # 16</a> <<a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU hang with libva (gstreamer)"
href="show_bug.cgi?id=97872#c16">https://bugs.freedesktop.org/show_bug.cgi?id=97872#c16</a>> on <a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU hang with libva (gstreamer)"
href="show_bug.cgi?id=97872">bug 97872</a> <<a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU hang with libva (gstreamer)"
href="show_bug.cgi?id=97872">https://bugs.freedesktop.org/show_bug.cgi?id=97872</a>> from haihao <<a href="mailto:haihao.xiang@intel.com">mailto:haihao.xiang@intel.com</a>>
> (In reply to Sean V Kelley from <a href="show_bug.cgi?id=97872#c13">comment #13</a> <x-msg://4/show_bug.cgi?id=97872#c13>)
> > Haihao,
> >
> > The 2nd VDBOX on SKL is not a complete VDBOX, it only contains MFX. I would
> > recommend shunting all MFX workloads to the 2nd VDBOX and using the 1st
> > VDBOX for HCP, VDENC, HuC.
>
> Usually user doesn't use different codecs at the same time. I don't think using
> BSD1 only for MFX is better choice for VP8/H264/MPEG2 etc.</span >
You can’t assume that. In fact, VDENC will likely dominate.
<span class="quote">> > What we need for a permanent fix is an i915
> > kernel patch that manages the loads between the engines based on input from
> > UMD.
>
> Currently i915 kernel can manage the loads between the engines. But i915
> kernel doesn't know HCP/HuC commands must be ran from the 2nd ring unless UMD
> driver can tell the kernel. which is why I915_EXEC_BSD_RING1 and
> I915_EXEC_BSD_RING2 are added to the execution ioctl.</span >
Yes, that is the whole point of the patch submitted to the i915, but it is
still a hack. I’m well aware of how this works. And that means every time we
use a new codec that is not balanced between the VDBoxen we add the hack flag.
Again, we need to do better.
Sean
<span class="quote">> >
> > So, while I find you patch servicable for the immediate need, I want to see
> > a long term fix along the lines above that I suggest. I will look into the
> > kernel patch.
> >
> > Thanks,
> >
> > Sean
>
> You are receiving this mail because:
> You are the QA Contact for the bug.</span ></pre>
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