<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - [SKL] Intel HD 520 failed to train DP when connected with a external monitor" href="https://bugs.freedesktop.org/show_bug.cgi?id=93578#c67">Comment # 67</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - [SKL] Intel HD 520 failed to train DP when connected with a external monitor" href="https://bugs.freedesktop.org/show_bug.cgi?id=93578">bug 93578</a> from <a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> Ville Syrjala</a> <pre>(In reply to Mads from <a href="show_bug.cgi?id=93578#c66">comment #66</a>) > Tested drm-intel-nightly f6a248e2507f98d7eb1f4fec8cfcbf685a33d289 > (4.9.0-rc8+), and the DA200 dongle still can't output high resolutions yet. > XPS 15 9550. > > Are there any new CONFIG options in the kernel we should make sure are > enabled? USB-C-stuff? There are none. That's really the problem. There is no USB-C driver/framework which could tell us how the cable is configured to carry DP. > > Why does USB-C -> DP work, but not USB-C -> DA200 -> HDMI? Are they not > related at all? (I'm typing this on a 4k monitor connected through USB-C > with a USB-C -> DP-dongle on the aforementioned XPS 15) The number of required/used lanes may differ between the cases, and the cables may be configured to use a different number of lanes for DP in each case. That could explain why low resolution might work and high resolution might not (low res needs fewer lanes). dmesgs (w/ drm.debug=0xe) from both low and high res use cases on the bad dongle using a recent kernel could help prove that. If you want to try a hideous hack, this might also help prove whether the number of used lanes is part of the problem: diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index db75bb924e48..3655e47faf61 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -158,6 +158,9 @@ static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) source_max = intel_dig_port->max_lanes; sink_max = drm_dp_max_lane_count(intel_dp->dpcd); + if (!is_edp(intel_dp)) + sink_max = min(sink_max, 2); + return min(source_max, sink_max); }</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the assignee for the bug.</li> <li>You are on the CC list for the bug.</li> <li>You are the QA Contact for the bug.</li> </ul> </body> </html>