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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - [BAT][GVT-d] timeout waiting for SBI to complete read transaction"
href="https://bugs.freedesktop.org/show_bug.cgi?id=99938#c12">Comment # 12</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - [BAT][GVT-d] timeout waiting for SBI to complete read transaction"
href="https://bugs.freedesktop.org/show_bug.cgi?id=99938">bug 99938</a>
from <span class="vcard"><a class="email" href="mailto:xiong.y.zhang@intel.com" title="XiongZhang <xiong.y.zhang@intel.com>"> <span class="fn">XiongZhang</span></a>
</span></b>
<pre>The issue is: "HAS_PCH_LPT_LP(dev_priv) ? SBI_GEN0 : SBI_DBUFF0" exist in
lpt_enable_clkout_dp() and lpt_disable_clkout_dp() function.
In GVT-d, PCH ISA bridge isn't passed through to guest, I915 could only
assume it is a LPT pch and couldn't identify whether it is a LPT_LP, LPT or
LPT_H PCH. So the above function will default read/write SBI_DBUFF0 register,
this is wrong if it is running on LPT_LP PCH.
The following experiment could remove this error message, but it also break LPT
and LPT-H pch.
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8b807a9..0c295f1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -135,6 +135,7 @@ static enum intel_pch intel_virt_detect_pch(struct
drm_i915_private *dev_priv)
DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
ret = PCH_LPT;
+ dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
} else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
ret = PCH_SPT;
Is there a method to identify LPT, LPT_LP or LPT_H from IGD itself, not from
PCH ISA bridge ?</pre>
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