<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][SKL] Test assertion failure function kmstest_dumb_create, file igt_kms.c:508 on fi-skl-6700hq"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101154#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][SKL] Test assertion failure function kmstest_dumb_create, file igt_kms.c:508 on fi-skl-6700hq"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101154">bug 101154</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>[ 419.523545] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking
for sink bpp constrains
[ 419.523568] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to
EDID reported max of 18
[ 419.523590] [drm:intel_dp_compute_config [i915]] DP link computation with
max lane count 1 max bw 270000 pixel clock 138700KHz
[ 419.523610] [drm:intel_atomic_check [i915]] Encoder config failure
Which boils down to it failing to find a suitable link:
for (; bpp >= 6*3; bpp -= 2*3) {
mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
bpp);
for (clock = min_clock; clock <= max_clock; clock++) {
for (lane_count = min_lane_count;
lane_count <= max_lane_count;
lane_count <<= 1) {
link_clock = intel_dp->common_rates[clock];
link_avail = intel_dp_max_data_rate(link_clock,
lane_count);
if (mode_rate <= link_avail) {
goto found;
}
}
}
}
because we need 2 lanes for the panel, and the max_lane_count has been left as
1 after the link training fudging.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the assignee for the bug.</li>
<li>You are the QA Contact for the bug.</li>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>