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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][SKL] *ERROR* failed to enable link training"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101144#c23">Comment # 23</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][SKL] *ERROR* failed to enable link training"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101144">bug 101144</a>
from <span class="vcard"><a class="email" href="mailto:marta.lofstedt@intel.com" title="Marta Löfstedt <marta.lofstedt@intel.com>"> <span class="fn">Marta Löfstedt</span></a>
</span></b>
<pre>(In reply to Manasi from <a href="show_bug.cgi?id=101144#c22">comment #22</a>)
<span class="quote">> (In reply to Jani Nikula from <a href="show_bug.cgi?id=101144#c17">comment #17</a>)
> > (In reply to Manasi from <a href="show_bug.cgi?id=101144#c14">comment #14</a>)
> > > I am trying to find out at what point can we first check for dp aux
> > > transactions and wait longer to try again?
> >
> > Can you explain how we'd end up in link training if native aux was failing
> > altogether? It must have worked for some time before link training, right?
> >
> > Ville's explanation would cover this as well.
>
> Actually it fails inside the function
> intel_dp_link_training_clock_reciovery() when it tries to write the TP1 and
> errors out saying "Failed to enable link training".
> Yes but it worked fine for DPCD reads over AUX, so that's why I am confused
> as to where we need to add the delay for the AUX reads?
>
> Also, shouldn't the spec for that specific panel or the eDP spec talk about
> how much delay should be given for the AUX read/writes?
> Any thoughts on double checking this in the spec?
>
> Manasi</span >
Manasi, I believe that one theory is that device have actually become
broken/unstable and that we should try to prove this somehow.
If you or Ville has some ideas on how to prove/disprove this, could you try
this on the try-bot, or provide a patch that I can run on the machine early in
the morning when the CI is usually idle.</pre>
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