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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][BYT,BSW] WARN_ON(dev_priv->uncore.funcs.mmio_readl(dev_priv, (((const i915_reg_t){ .reg = (0x180000 + 0x650C) })), true) & (1 << 27))"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101517#c7">Comment # 7</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][BYT,BSW] WARN_ON(dev_priv->uncore.funcs.mmio_readl(dev_priv, (((const i915_reg_t){ .reg = (0x180000 + 0x650C) })), true) & (1 << 27))"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101517">bug 101517</a>
from <span class="vcard"><a class="email" href="mailto:krisman@collabora.co.uk" title="krisman@collabora.co.uk">krisman@collabora.co.uk</a>
</span></b>
<pre>(In reply to Ville Syrjala from <a href="show_bug.cgi?id=101517#c4">comment #4</a>)
<span class="quote">> The simple solution would be to just revert commit 63ff30442519 ("drm/i915:
> Nuke the VLV/CHV PFI programming power domain workaround")
>
> I failed to consider that the firmware likes to reset the cdclk to some
> non-minimum frequency during suspend, and then we apparently perform a
> modeset without actually modesetting anything and thus only end up
> reprogramming the cdclk without the power well being enabled.</span >
trybot confirmed it addresses the issue:
<a href="https://intel-gfx-ci.01.org/CI/Trybot_973/">https://intel-gfx-ci.01.org/CI/Trybot_973/</a></pre>
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