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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [bdw-u iommu] DMAR error -> GPU hang"
href="https://bugs.freedesktop.org/show_bug.cgi?id=89360#c58">Comment # 58</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [bdw-u iommu] DMAR error -> GPU hang"
href="https://bugs.freedesktop.org/show_bug.cgi?id=89360">bug 89360</a>
from <span class="vcard"><a class="email" href="mailto:changbin.du@intel.com" title="Du, Changbin <changbin.du@intel.com>"> <span class="fn">Du, Changbin</span></a>
</span></b>
<pre>Chris, I did a experiment that make the intel_unmap as a noop. Then the old dma
region keeps mapped, and new allocated buf always has new IOVA. Thus I didn't
reproduce this issue.
Therefor, I guess BDW GPU may still issue DMA transaction with old unmapped dma
region, even that workload has finished. And I always see the hang at PIPE_CTL.
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3787,7 +3787,7 @@ static void intel_unmap(struct device *dev, dma_addr_t
dev_addr, size_t size)
struct intel_iommu *iommu;
struct page *freelist;
- if (iommu_no_mapping(dev))
+ //if (iommu_no_mapping(dev))
return;
domain = find_domain(dev);
BTW, sometimes the IOMMU fault addr is 48 bit which more like a Gfx VA, but
sometimes it is 33bit or less which more like a IOVA or Pysical Address. Per my
understanding IOMMU fault should always be IOVA, so how does a Gfx VA recored,
is the dedicated gfx iommu special?
Thanks,
Changbin.</pre>
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